PURPOSE: To reduce delay by outputting call data inputted by means of an even-numbered/odd-numbered frame by an odd-numbered/even-numbered frame or outputting call data which is stored at last in accordance with a multi or single slot call.

CONSTITUTION: Input data is written in data memories 8 and 9 by the signal of a write timing generating circuit 2 and a signal indicating whether it is received by an even-numbered or odd-numbered frame is outputted from a frame counter 3. A time slot(TS) counter 4 counts a TS number and a call classification memory 7 stores whether the multi or single slot call (MC or SC) at every TS. A switch control memory 11 stores how many kinds of input TS data is outputted at every output TS and a control circuit 5 executes the setting of the memories 7 and 11. By following the output of the counter 3 in accordance with MC or SC, the signal of the circuit 2 is proportioned by a proportioning circuit 6 alternately to the memories 8 and 9 or to both of them and data of a data memory where writing is not executed is selected by a selecting circuit 10 so as to be outputted. Thus, delay is reduced.