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Title:
TIMING EXTRACTION CIRCUIT
Document Type and Number:
Japanese Patent JPH0290748
Kind Code:
A
Abstract:

PURPOSE: To improve the realization of a timing extraction circuit of a high speed PCM signal transmission system by adopting a form usable at a region of 1/N frequency division ratio for a high Q surface acoustic wave filter required for timing extraction.

CONSTITUTION: A coarse timing component is extracted from an input signal, and after the coarse timing component is frequency-divided into 1/N frequency region by a 1/N frequency divider circuit 23, a clock signal is generated in a highly stable timing tank and its clock signal is multiplied by an N multiple circuit 26 as a multiple of N. Then the direction of fluctuation of a phase of a 1st timing extraction filter 21, a 1st limiter amplifier 22, a 2nd timing extraction filter 24 and a 2nd limiter amplifier 25 with respect to temperature is selected so as to cancel the fluctuation in terms of their polarities. Thus, the realization of the timing extraction circuit of the high speed PCM signal transmission system is improve and the fluctuation of the phase with respect to temperature at code identification by an identification circuit is decreased and the performance of the communication system is improved.


Inventors:
TAKANO ISAMU
Application Number:
JP24197088A
Publication Date:
March 30, 1990
Filing Date:
September 27, 1988
Export Citation:
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Assignee:
NEC CORP
International Classes:
H04L7/027; H04L7/033; (IPC1-7): H04L7/027
Domestic Patent References:
JPS61277239A1986-12-08
JPS62155640A1987-07-10
Attorney, Agent or Firm:
Ozeki Shinsuke