Title:
【発明の名称】バイナリカウンタ読み出し回路
Document Type and Number:
Japanese Patent JP3088302
Kind Code:
B2
Abstract:
An asynchronous reading circuit improves reliability of data read from a binary counter. Count data generated by a binary counter 101 according to a counting clock is converted into a gray code by a gray encoder. The count data represented by the gray code is sampled by a sampling circuit according to a timing signal asynchronous with the counting clock. The sampled count data is decoded into binary count data by a gray decoder.
Inventors:
Hideaki Takahashi
Takayuki Nagai
Takayuki Nagai
Application Number:
JP23592596A
Publication Date:
September 18, 2000
Filing Date:
August 19, 1996
Export Citation:
Assignee:
NEC
Shizuoka NEC Corporation
Shizuoka NEC Corporation
International Classes:
H03K21/08; H03K21/12; H03M7/16; (IPC1-7): H03M7/16; H03K21/08
Domestic Patent References:
| JP4217118A | ||||
| JP8149117A | ||||
| JP62179221A | ||||
| JP1251822A | ||||
| JP6350123A | ||||
| JP396122A | ||||
| JP5946031U |
Attorney, Agent or Firm:
Yuuji Katsuragi