Title:
VERTICAL DEFLECTION CIRCUIT FOR TELEVISION RECEIVER
Document Type and Number:
Japanese Patent JPH0698185
Kind Code:
A
Abstract:
PURPOSE: To minimize the capacity of vertical deflection circuit for storing video signals by starting vertical deflection together with a first horizontal pulse following the edge of a vertical pulse and terminating the deflection at a standby position which precedes the next vertical pulse. CONSTITUTION: A vertical synchronization pulse Va separated from received signals BAS is supplied to a pulse shaper 2, and the shaper 2 generates a vertical pulse V having a duration which is equal to or longer than one scanning line. The vertical pulse V and a horizontal pulse H* derived from a scanning line deflection current IH are supplied to the input side of a synchronous stage 3. Vertical deflection is started, together with the first horizontal pulse H* following the edge of the vertical pulse V and terminated at the standby position which precedes the next vertical pulse. When a vertical deflection circuit is constituted in such a way, the video signal storing capacity of the circuit can be minimized, and the circuit becomes suitable for an asynchronous self-running and oscillating horizontal deflection circuit.
Inventors:
GANGORUFU HIRUTSU
Application Number:
JP10534693A
Publication Date:
April 08, 1994
Filing Date:
May 06, 1993
Export Citation:
Assignee:
THOMSON BRANDT GMBH (DE)
International Classes:
H04N3/16; H04N3/30; H04N5/12; (IPC1-7): H04N3/16
Attorney, Agent or Firm:
Toshio Yano (2 outside)
Next Patent: HORIZONTAL DEFLECTION CIRCUIT