Title:
【発明の名称】立上り時間及び立下り時間を制御したCMOS出力回路、並びにその制御方法
Document Type and Number:
Japanese Patent JP2636891
Kind Code:
B2
Abstract:
A CMOS output driver having precise control of rise and fall times of signals generated from the output driver on a VLSI semiconductor chip. Two time-dependent voltage generators provide a separate ramp signal to each one of the gates of a CMOS inverter circuit. The ramp signal characteristics of each voltage generator are determined by the combination of a controlled current source charging a known capacitance.
Inventors:
EDOWAADO TEII RUISU
Application Number:
JP18278788A
Publication Date:
July 30, 1997
Filing Date:
July 21, 1988
Export Citation:
Assignee:
REISEON CO
International Classes:
H03K4/94; H03K17/16; H03K17/687; H03K19/0175; H03K19/0185; (IPC1-7): H03K17/16; H03K19/0175; H03K19/0185
Domestic Patent References:
| JP58196725A | ||||
| JP5577237A | ||||
| JP58196726A |
Attorney, Agent or Firm:
Kyozo Yuasa (4 outside)