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Title:
MASTER/SLAVE COMPUTER SYSTEM AND MASTER SELECTION CONTROL METHOD
Document Type and Number:
Japanese Patent JPH0644090
Kind Code:
A
Abstract:

PURPOSE: To prevent the useless master re-selection processing associated with competition occurrence.

CONSTITUTION: A same processing is executed in parallel by plural computers (CPU), one of them is adopted as the main one (M) and the others are the stand-by ones (S) and also one of CPUs being S is adopted as M at the time of a fault in M in a system. In the system, respective CPUs are provided with a role storage means 11 storing role information which shows whether CPU itself is M or not, a time storage means 12 (role renewal processing decision time storage part) storing the renewal time of the contents of the role storage means as time information, a selecting means 14 which executes an inquiry to respective CPUs at the time of the fault in M, receives role information and time information of respective CPUs, which are obtained by the result, so as to select the optimum one as M, renews the role decision time, adopts time information after renewal as new time information and outputs role information and new time information of respective CPUs, which are decided by selection, a responding means 13 responding the present state of itself adding role information and time information for the inquiry, a means 15 (updating part) which receives the report of role information and new time information for self CPU which is decided by the selecting means and updates the storage contents of the role storage means and the time storage means of the self CPU and a recognizing means 16 executing a re-inquiry.


Inventors:
HARASHIMA HIDEJI
Application Number:
JP19961592A
Publication Date:
February 18, 1994
Filing Date:
July 27, 1992
Export Citation:
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Assignee:
TOSHIBA CORP
International Classes:
G06F11/16; G06F15/16; G06F15/177; (IPC1-7): G06F11/16; G06F15/16
Attorney, Agent or Firm:
Takehiko Suzue



 
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