Title:
【発明の名称】EMI低減絶縁バスシステム
Document Type and Number:
Japanese Patent JP2003518908
Kind Code:
A
Abstract:
A current-limited low-impedance return path is provided between an isolated bus system and the primary supply that provides this isolated bus system. In a preferred embodiment, a voltage follower circuit with an input at ground potential supplies a controlled zero-voltage to a center-tap on the load side of an isolation transformer. This voltage follower circuit provides a low-impedance path for unbalanced communications signals, but is configured to present a high-impedance, or current-limited, path to short-circuit currents. In this manner, the commonmode voltage changes that are caused by parasitic currents between the primary supply and the isolated bus system are minimized by providing the low-impedance path for these currents, and the isolation is maintained by providing the high-impedance path for short-circuit currents.
Inventors:
Martin, Bledius
Application Number:
JP2001549110A
Publication Date:
June 10, 2003
Filing Date:
December 14, 2000
Export Citation:
Assignee:
Konin Krekka Philips Electronics NV
International Classes:
B60R16/02; B60R21/01; H02M1/44; H02M3/28; H02M3/335; H04B3/56; (IPC1-7): H02M3/28; B60R16/02
Attorney, Agent or Firm:
Kenji Yoshitake (4 others)