PURPOSE: To set a code identification timing to the optimum point at all times the detection of reproduction digital information signal utilizing a partial response (PR) class IV system.

CONSTITUTION: A reproduction digital information signal is equalized to a PR (1, -1) system with a equalization circuit 4 and then to a ternary signal of a PR class IV system with an arithmetic circuit 5. This ternary signal is turned to a binary signal with a conversion circuit 6 and a digital information signal is identified and reproduced by the use of latch circuit 7. Besides, a clock is generated with a clock component extraction circuit 8 and a PLL circuit 9 synchronizing a clock component of an output signal of the equalization circuit 4 and is adjusted in phase with a variable delay circuit 11 to be turned to a latch pulse of the latch circuit 7. In addition, a control signal is generated from the latch pulse and input and output signals of the latch circuit 7 to control the delay time of the variable delay circuit 11 This always enables the setting of a code identification timing of the binary signal to the optimum point with the latch circuit 7.