PURPOSE: To weaken resistance caused by a load condition and disturbing distortion caused by inductance of a substrate by providing a detection resistance on a source side of a power amplifying element, and to limit at a high speed a current increase caused by a fluctuation of a load of an output transistor so that an output circuit can be protected.

CONSTITUTION: Drains of output transistors TR1, TR2 are connected to a voltage level shift circuit 1a, and subjected to cascade connection to sources of transistor FETs TR3, TR4 through current detection resistances RS1, RS2. In such a state, when currents of the output transistors TR1, TR2 increase due to a short circuit of a load RL, etc., across voltages of the detection resistances R1, R2 are increased. Subsequently, in the case of becoming a value by which a VBE of detection amplification transistors TR5, TR6 is turned on, a VBE of the transistors TR3, TR4 is fixed by diodes D1, D2 and the transistors TR5, TR6 and limited to a prescribed current value. Accordingly, source currents of the output transistors TR1, TR2 are also limited.