PURPOSE: To obtain a semiconductor storage device whose high-speed operation is not hindered by a noise countermeasure by enlarging the noise margin of an address signal inputting buffer circuit. etc., only at the time of starting the operation of an output buffer circuit.

CONSTITUTION: When an output buffer circuit control signal 42 generated from a first timing signal generating circuit 8 is changed to 'L' and a second timing signal generating circuit 11 detects the start of the operation of the output buffer circuit 6, the circuit 11 makes an input buffer circuit control signal 0 active for a constant period of time. The address signal inputting buffer circuit 1 enlarges the noise margin trasiently by changing a hysterisis characteristic when the signal 0 is active. Thus, the fear that the output of the circuit 1 changes is eliminated even though noise is generated in accordance with the start of the operation of the circuit 6 and the amplitude of a signal inputted to the circuit 1 is relatively changed, and a wrong detection that the input signal is changed due to the noise generated at the time of starting the operation of the circuit 6 can be dissolved.