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Title:
SHIFT ARITHMETIC OPERATION UNIT
Document Type and Number:
Japanese Patent JPH0683577
Kind Code:
A
Abstract:

PURPOSE: To provide the shift arithmetic operation unit in which an output bit width of the shift arithmetic operation unit is the same bit width of source data width and the shift reverse to the basic shift direction is executed without use of a correction circuit.

CONSTITUTION: A shift arithmetic operation unit shifting data having a bit width in the unit of bits is provided with a left shift use decode means 21 decoding shift information shifting data in the left direction, a right shift use decode means 22 decoding shift information shifting data in the right direction and shift means 23, 24 receiving selectively an output of the decode means to shift the data in the unit of bits.


Inventors:
NAGANO TAKESHI
Application Number:
JP23079592A
Publication Date:
March 25, 1994
Filing Date:
August 31, 1992
Export Citation:
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Assignee:
OKI ELECTRIC IND CO LTD
International Classes:
G06F7/00; G06F5/01; G06F7/76; (IPC1-7): G06F5/01; G06F7/00
Attorney, Agent or Firm:
Mamoru Shimizu (2 outside)