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Title:
【発明の名称】セラミックチップヒューズの改良
Document Type and Number:
Japanese Patent JP3075414
Kind Code:
B2
Abstract:
A subminiature circuit protector includes a plurality of layers of ceramic material in a laminate structure, each layer bearing a fuse element. The ends of laminate structure are coated with electrically conductive end terminations. The fuse elements of the layers may be connected in parallel, with fuse elements on each layer connecting to both end terminations, or interconnected in series from one end termination to the other. Each of the fuse elements of the individual layers may comprise two or more individual fuse elements connected in series or in parallel. A method for manufacturing the circuit protector in accordance with the invention includes the steps of printing a multiplicity of fuse elements on a plurality of substrates, stacking the substrates to form a laminate structure, cutting the laminate into individual units, and coating the opposite ends of the units with electrically conductive material to form end terminations.

Inventors:
Stephen, Whitney
Spalding, Keith
Winnet, Joanne
Carla, Balinder
Application Number:
JP51036396A
Publication Date:
August 14, 2000
Filing Date:
September 12, 1995
Export Citation:
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Assignee:
Cooper Industries, Inc.
International Classes:
H01H69/02; H01H61/02; H01H85/00; H01H85/04; H01H85/041; H01H85/0445; H01H85/045; H01H85/046; H01H85/12; H01H85/143; H01H85/165; H01H85/17; H01H85/50; (IPC1-7): H01H85/147; H01H69/02; H01H85/50
Domestic Patent References:
JP60221923A
JP60221920A
JP2503969A
Other References:
【文献】米国特許3526541(US,A)
【文献】米国特許5228188(US,A)
【文献】国際公開93/17442(WO,A1)
Attorney, Agent or Firm:
Takashi Ishida (3 others)