Title:
【発明の名称】集積回路デバイス
Document Type and Number:
Japanese Patent JP2002512436
Kind Code:
A
Abstract:
A method of producing packaged optronic integrated circuit devices comprises (a) providing a transparent protective layer (26) overlying a first surface of a semiconductor wafer (20) including a plurality of dies; (b) forming notches extending into the wafer (20) from a second surface of the wafer (20), the notches being disposed at dice lanes between the dies; (c) providing an insulating layer (42) overlying the second surface of the wafer (20) and having an outer surface facing away from the wafer (20); (d) forming contacts electrically connected to the dies, the contacts extending outo the outer surface of the insulating layer (42); and then severing the transparent protective layer (26) to separate the dies from one another.
Inventors:
Abner, Badeh
Application Number:
JP2000530942A
Publication Date:
April 23, 2002
Filing Date:
February 03, 1999
Export Citation:
Assignee:
Shell case limited
International Classes:
H01L23/31; H01L23/485; H01L25/10; H01L27/146; H01L27/15; H01L31/02; H01L33/58; H01L33/62; (IPC1-7): H01L31/02; H01L33/00
Domestic Patent References:
| JPH01251754A | 1989-10-06 | |||
| JPH01270362A | 1989-10-27 | |||
| JPH01151275A | 1989-06-14 | |||
| JPH0894888A | 1996-04-12 | |||
| JPS6362267A | 1988-03-18 | |||
| JPS56103481A | 1981-08-18 | |||
| JPH04334056A | 1992-11-20 | |||
| JPH04129269A | 1992-04-30 | |||
| JPH09130683A | 1997-05-16 | |||
| JPS646053U | 1989-01-13 | |||
| JPH08181336A | 1996-07-12 | |||
| JPH0677451A | 1994-03-18 |
Attorney, Agent or Firm:
Takashi Ishida (4 others)