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Patent Searching and Data


Title:
CONSTANT-GAIN PHASED-LOCK LOOP
Document Type and Number:
Japanese Patent JPH0629836
Kind Code:
A
Abstract:
PURPOSE: To obtain an improved constant gain PLL by providing a charge pump, a phase detector and a level deciding circuit, supplying gain of an average ampere per fixed radian and also not being affected by the fluctuation of an input signal. CONSTITUTION: A charge pump 50 has plural current sources and plural current sinks. When a pump down signal becomes active and a switch 68 is closed, the amplitude of pump down current can adequately be adjusted. An adjustment amplitude becomes different according to either switch that is closed between switches 70 and 72. Then, the amplitude of output current of the charge pump can be adjusted by showing the charge pump and making an adequate switch signal enable. The dynamical adjustment of pump up current or pump down current of the charge pump prevents a PLL gain from being affected by the fluctuation of a data pattern. Then, a more improved constant gain PLL can be acquired.

Inventors:
RONARUDO REON KOBAAN
Application Number:
JP3986793A
Publication Date:
February 04, 1994
Filing Date:
March 01, 1993
Export Citation:
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Assignee:
IBM
International Classes:
H03L7/089; H03L7/107; H04L7/033; (IPC1-7): H03L7/089
Domestic Patent References:
JPS6418316A1989-01-23
Foreign References:
US4745372A1988-05-17
US4167711A1979-09-11
Attorney, Agent or Firm:
Koichi Tonmiya (5 people outside)