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Title:
CHATTERING PREVENTING CIRCUIT
Document Type and Number:
Japanese Patent JPS583419
Kind Code:
A
Abstract:

PURPOSE: To prevent chattering having no dull output waveform, by releasing the reset mode of a shift register with a contact signal and at the same time feeding a shift input.

CONSTITUTION: When a contact S is closed, the flip-flops FF1∼FF4 are reset to set an output OUT at a low level. In this case the FF1∼FF4 are reset before the inversion of the FF4 althrough the contact S has chattering. Thus no chattering is caused to the output. When the contact S is opened, the reset mode is released for the FF1∼FF4. Then the FF4 is inverted at the 4th clock CK to set the output at a high level after the chattering is eliminated for the contact S.


Inventors:
UEKI MASARU
Application Number:
JP10191581A
Publication Date:
January 10, 1983
Filing Date:
June 30, 1981
Export Citation:
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Assignee:
FUJITSU LTD
International Classes:
H03K5/1254; H03K5/1252; (IPC1-7): H03K5/01
Domestic Patent References:
JPS5025446B11975-08-23
Attorney, Agent or Firm:
Sadaichi Igita



 
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