PURPOSE: To obtain an inexpensive serial/parallel data conversion circuit device without generating pulse signal abnormality even when a large capacity load is connected.

CONSTITUTION: An inverted serial data pulse signal 21a obtained by cascade- connecting flip flop(FF) circuit devices 1a to 1n and connecting an inverter circuit 5 to the input terminal of the cascade connection is applied to the input terminal D of the device 1a. The device 1a outputs an output pulse signal 40a having the same phase as that of the signal 21a from one output terminal Q to the input terminal D of the succeeding device 1b. An output pulse signal inverted from the signal 21a, having the same phase as that of a serial data pulse signal 20 and buffered by an inverter circuit built in the device 1a is outputted from an output terminal QB. The output pulse signal from the output terminal QB is outputted from an output terminal 4a as a parallel data pulse signal 40a. Circuit devices 1b to in are similarly constituted.