Title:
SEMICONDUCTOR DEVICE
Document Type and Number:
Japanese Patent JPS5815272
Kind Code:
A
Abstract:
PURPOSE: To improve the bondability and stability of a gate electrode and to reduce the resistance of the electrode by forming the gate electrode of an MOS semiconductor element of silicon-metal-silicon as 3-layer structure.
CONSTITUTION: An Si wafer 1 is oxidized, and a gate oxidized film 2 is formed as an insulating film on the surface. Then, a polysilicon 3 is formed as the first layer of the gate electrode on the film 2, and phosphorus 4 is deposited on the silicon 3 as required. Thereafter, metal 5 is deposited as the second layer of the gate electrode and polysilicon 6 sequentially deposited as the third layer on the polysilicon 3, and phosphorus 7 is deposited on the silicon 6 as required.
Inventors:
AJIOKA TSUNEO
ICHIKAWA FUMIO
UCHIHO KOUSUKE
ICHIKAWA FUMIO
UCHIHO KOUSUKE
Application Number:
JP11230481A
Publication Date:
January 28, 1983
Filing Date:
July 20, 1981
Export Citation:
Assignee:
OKI ELECTRIC IND CO LTD
International Classes:
H01L29/78; H01L21/3205; H01L23/52; H01L29/51; (IPC1-7): H01L21/80; H01L29/62; H01L29/78
Attorney, Agent or Firm:
Hiroshi Kikuchi