Title:
【発明の名称】低電流基板バイアス発生回路
Document Type and Number:
Japanese Patent JP2624585
Kind Code:
B2
Abstract:
A low current substrate bias generator for regulating the voltage of a substrate layer of an integrated circuit includes a sense circuit having an input for sensing the voltage of the substrate and an output that is coupled to an inverter for providing a control signal. The control signal controls a charge pump that is coupled to the substrate layer or well that is desired to be regulated. The sense circuit includes a load element and a level shifting circuit having a predetermined standing current requirement that flows directly into the substrate. The current requirement of the bias generator is reduced by increasing the value of the load element and a reasonable delay time is maintained by coupling a capacitor across the level shifting circuit. Since the voltage across the capacitor cannot be changed instantaneously, changes in the substrate voltage are directly coupled from the input to the output of the sense circuit, triggering the charge pump. Regulation of the substrate voltage level proceeds with no corresponding increase in delay time.
Inventors:
Wen fu chain
Application Number:
JP22012491A
Publication Date:
June 25, 1997
Filing Date:
August 30, 1991
Export Citation:
Assignee:
Micron Technology Inc.
International Classes:
G11C11/413; G11C11/408; H01L21/822; H01L27/04; H02M3/07; H03K19/094; H03L1/00; (IPC1-7): H01L27/04; G11C11/413; H01L21/822; H02M3/07; H03K19/094
Domestic Patent References:
| JP6159688A | ||||
| JP2241355A | ||||
| JP57199355A |
Attorney, Agent or Firm:
Hidekazu Miyoshi