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Title:
METHOD AND DEVICE FOR TESTING LCD PANEL ARRAY
Document Type and Number:
Japanese Patent JPH0643415
Kind Code:
A
Abstract:

PURPOSE: To easily test a large-sized array by logically dividing a panel into areas and separately testing each area and discriminating sections which have at least one cross short-circuit.

CONSTITUTION: Under the control of a test controller 28, panel interface circuits 22 are constituted in the bypass mode, and a precise measurement unit(PMU) 26 is instructed to output a test current signal to the panel interface circuit 22 coupled to a gate line in a prescribed area. The prescribed circuit 22 relays a common test current signal from the PMU 26 to the gate line. Further, the controller 28 instructs the PMU 26 to monitor the panel interface circuit 22 coupled to a driving line in the prescribed area. When the PMU 26 detects a current in a monitored, the controller 28 indicates that this area has a defect, and smaller subareas of the defective area are tested again in a following area examination test by a series of other area separate tests.


Inventors:
FURANSOWA JIEI HENRII
MAIKERU JIEI MIRAA
Application Number:
JP26265291A
Publication Date:
February 18, 1994
Filing Date:
September 17, 1991
Export Citation:
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Assignee:
PHOTON DYNAMICS INC
International Classes:
G01R31/02; G01R31/308; G01R31/317; G02F1/13; G09G3/00; G09G3/36; (IPC1-7): G02F1/13; G01R31/02; G09G3/36
Attorney, Agent or Firm:
Masaki Yamakawa



 
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