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Title:
CIRCUIT FOR GENERATING REFERENCE CURRENT
Document Type and Number:
Japanese Patent JPH0675648
Kind Code:
A
Abstract:

PURPOSE: To output reference currents insensitive to temperature and process change by providing voltage generating means which output a first voltage and a second voltage, and linking a resistance and a MOS diode between a constant voltage and the second voltage.

CONSTITUTION: An NMOS transistor MN3 having a gate electrode, drain electrode, and source electrode connected with a ground voltage is additionally provided at a reference current generating circuit constituted of PMOS transistors MP1 and MP2, NMOS transistor MN1 and MN2, and resistance R1. In this case, reference currents Iref running through the PMOS transistor MP2 are in proportion to a value obtained by subtracting the threshold voltage of the NMOS transistor MN3 from the threshold voltage value of the NMOS transistor MN1. Therefore, almost the constant currents can be outputted from the reference currents Iref without being sensitively changed due to temperature and process change.


Inventors:
RII JIEHEN
RI TOUZAI
Application Number:
JP12352892A
Publication Date:
March 18, 1994
Filing Date:
May 15, 1992
Export Citation:
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Assignee:
SAMSUNG ELECTRONIC
International Classes:
G05F3/24; G05F3/22; (IPC1-7): G05F3/22
Domestic Patent References:
JPS63316114A1988-12-23
Attorney, Agent or Firm:
Kobori Masashi