Title:
【発明の名称】モジュール型グレイコードカウンタ
Document Type and Number:
Japanese Patent JP3298654
Kind Code:
B2
Abstract:
A Gray Code counter is provided having synchronous, modular circuits for each of the three types of bit positions, i.e., least significant bit ("LSB"), most significant bit ("MSB") and middle bit ("MB"). One LSB and MSB circuit each are used with as many MB circuits in between as are necessary to provide a counter having the desired number of bits. The LSB, MSB and MB circuits' designs are truly modular in that duplicate MB circuits can be freely coupled together between an LSB circuit and an MSB circuit to provide the desired number of counter bits without modifying any input or output interfaces between the circuits. The counter can count either up or down in accordance with a normal Gray Code sequence.
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Inventors:
Christopher M. Hall
Application Number:
JP22811391A
Publication Date:
July 02, 2002
Filing Date:
May 31, 1991
Export Citation:
Assignee:
National Semiconductor Corporation
International Classes:
H03K21/00; H03K21/40; H03K23/00; (IPC1-7): H03K21/00; H03K23/00
Domestic Patent References:
| JP62179221A | ||||
| JP53111253A |
Attorney, Agent or Firm:
Masaaki Kobashi
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