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Title:
INPUT CIRCUIT SYSTEM OF MICROCOMPUTER
Document Type and Number:
Japanese Patent JPS5945538
Kind Code:
A
Abstract:

PURPOSE: To omit a pull up or pull down resistor connected between an input terminal and an inverter and to reduce the power consumption of an integrated circuit, by providing an input integrated circuit of a microcomputer with an inverter, a comparator, an input state storage circuit, etc.

CONSTITUTION: An one-chip microcomputer consists of a central operating circuit 1, an ROM2, an RAM3, an input circuit 4, an output circuit 5, and an oscillation timing generating circuit 6. A slide switch 12 to select terminals VDD and VSS is connected to the input terminals IoWIn of the computer to omit the connection of a resistor consisting of a diffusion resistor or an FET between the terminals IoWIn and the input inverter 13. An input feedback inverter 14 is connected to the inverter 13 and the output of the inverter 13 is applied to a comparator 16 to compare the output from the inverter 13 with a past input level stored in an input state storage circuit 17. An OR circuit 18 finds OR of outputs from plural circuits 17. Consequently, the power consumption of the integrated circuit is reduced.


Inventors:
YAMASHITA HIROYUKI
TATAI TOSHIO
Application Number:
JP15620282A
Publication Date:
March 14, 1984
Filing Date:
September 07, 1982
Export Citation:
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Assignee:
SUWA SEIKOSHA KK
International Classes:
G06F3/02; G06F1/32; (IPC1-7): G06F3/02
Domestic Patent References:
JPS54104259A1979-08-16
Attorney, Agent or Firm:
Kisaburo Suzuki (4 outside)