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Title:
SEMICONDUCTOR MEMORY
Document Type and Number:
Japanese Patent JPH0684367
Kind Code:
A
Abstract:

PURPOSE: To obtain a semiconductor memory stably actuated and whose power consumption is reduced with respect to the variation of manufacture or the change of an acting condition as to the semiconductor memory where the time width of a read-out signal is set by executing the feedback of the read-out information of a second cell array.

CONSTITUTION: A delay circuit 42 and a second control circuit 43 are inputted between the output D1 of a first control circuit 41 and a first read-out circuit 5 and the output of the control circuit 43 is regarded as the read-out signal RE by the input of the first read-out circuit 5. Since the time width of read-out can be set by the delay time of the delay circuit 42, a stable circuit action can be obtained.


Inventors:
IKEDA SETSUKO
Application Number:
JP23578492A
Publication Date:
March 25, 1994
Filing Date:
September 03, 1992
Export Citation:
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Assignee:
NIPPON ELECTRIC IC MICROCOMPUT
International Classes:
G11C11/41; G11C11/409; (IPC1-7): G11C11/41; G11C11/409
Attorney, Agent or Firm:
Naoki Kyomoto (2 outside)



 
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