Title:
【発明の名称】位相同期回路
Document Type and Number:
Japanese Patent JPH07120946
Kind Code:
B2
Abstract:
A phase locked loop circuit including a controllable oscillator, a phase detector for detecting a phase difference between an output signal of the oscillator and an input signal, and a control signal generator for generating a control signal for controlling an oscillation frequency of the oscillator on the basis of the output of the phase detector. The phase locked loop circuit also includes a feedback circuit for controlling a level of the control signal on the basis of a DC level thereof. The feedback circuit is able to temperature compensate for changes in the oscillator output signal thereby keeping the lock range of the phase locked loop circuit constant against variations in temperature.
Inventors:
Toshihiko Ichinose
Tsuguhide Sakata
Kawai Hisa
Tsuguhide Sakata
Kawai Hisa
Application Number:
JP13699385A
Publication Date:
December 20, 1995
Filing Date:
June 25, 1985
Export Citation:
Assignee:
Canon Inc
International Classes:
H03L1/02; H03L7/093; H03L7/10; H03L7/187; H03L7/18; (IPC1-7): H03L7/10; H03L7/187
Domestic Patent References:
| JP59115624A | ||||
| JP55154833A |
Attorney, Agent or Firm:
Takaharu Takita