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Patent Searching and Data


Title:
【発明の名称】パルス発生回路
Document Type and Number:
Japanese Patent JPH067647
Kind Code:
B2
Abstract:
A pulse generating circuit is provided for generating a pulse having a time width synchronized with an input pulse and corresponding to a reference voltage. The circuit is particularly designed not to be affected by parasitic capacitance. A circuit for charging one electrode of an integrating circuit with a constant current is controlled by turning on or off a switch in response to the input pulse. The other electrode of the integrating capacitor is connected with a reference voltage source by driving a switch in response to a pulse having a pulse width which contains the time period of the input pulse and which is wider than the input pulse. A comparator is provided for comparing the potential at one electrode of the integrating capacitor and ground potential. A desired pulse is generated by a logic circuit which is receives both the output of the comparator and the input pulse.

Inventors:
TAKATORI HIROSHI
SUZUKI TOSHIRO
MATSUBARA OSAMU
YAMADA IZURU
Application Number:
JP15524684A
Publication Date:
January 26, 1994
Filing Date:
July 27, 1984
Export Citation:
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Assignee:
HITACHI LTD
International Classes:
H03K4/02; H03K5/04; (IPC1-7): H03K5/04; H03K4/02
Attorney, Agent or Firm:
Katsuo Ogawa (1 person outside)