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Title:
METHOD AND SYSTEM FOR FABRICATING SEMICONDUCTOR SUBSTRATE
Document Type and Number:
Japanese Patent JPH0729827
Kind Code:
A
Abstract:

PURPOSE: To form a barrier metal with good step coverage, when filming and surface treatment of a semiconductor substrate are conducted in a reaction chamber by low pressure CVD system, by introducing previously activated exciting gas and reaction gas through individual paths and then mixing them uniformly in the reaction chamber.

CONSTITUTION: A gas introduction flange 4 comprises a gas introduction plate 11 having holes for jetting three kinds of gas, and three gas introduction chambers 12, 13, 14. The first gas introduction chamber 12 is coupled with an activation chamber 16 applied with a high frequency exciting coil 15. The second gas introduction chamber is coupled with a second gas piping 19 for introducing a second gas G2, e.g. a reaction gas of TiCl4, through a gas flow rate controller 20. Furthermore, a third gas G3 is principally jetted through the third jet hole to a region 26 between a quartz pipe 2 and a partition pipe 3.


Inventors:
JINRIKI HIROSHI
KAIZUKA KENJI
Application Number:
JP17277693A
Publication Date:
January 31, 1995
Filing Date:
July 13, 1993
Export Citation:
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Assignee:
KAWASAKI STEEL CO
International Classes:
H01L21/205; (IPC1-7): H01L21/205
Attorney, Agent or Firm:
Eiichi Kobayashi



 
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