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Title:
MANUFACTURE OF SHOTTKY GATE FIELD EFFECT TRANSISTOR
Document Type and Number:
Japanese Patent JPS6057977
Kind Code:
A
Abstract:

PURPOSE: To reduce series resistance between a source and a gate, and to enable to manufacture an MOSFET of favorable characteristic with favorable reproducibility by a method wherein the source and a drain electrodes are formed by selfalignment in relation to the gate electrode, and the N type GaAs layers of the source and drain parts are etched up to a substrate to bury the electrodes therein.

CONSTITUTION: A resist layer 27 is formed excluding source, drain and gate electrode parts according to light exposure technique, the source and drain parts of an N type GaAs epitaxial layer 22 are removed up to depth inside of a semiinsulating GaAs substrate 21 according to dry etching using an Ar ion beam 28 to form the window hole parts 29, 30 of the source and the drain. Then an alloy 31 of gold (Au)-germanium (Ge) is evaporated on the whole surface. Thickness thereof is made as to make the surfaces of the source and drain electrodes 32, 33 evaporated in the window hole parts 29, 30 to be positioned under the surface of the N type GaAs epitaxial layer 22. Then, the resist layer 27 is lifted off to remove the resist layer 27 and the alloy 31 evaporated thereon.


Inventors:
UENOYAMA TAKESHI
Application Number:
JP16698183A
Publication Date:
April 03, 1985
Filing Date:
September 09, 1983
Export Citation:
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Assignee:
MATSUSHITA ELECTRIC IND CO LTD
International Classes:
H01L29/812; H01L21/338; H01L29/417; H01L29/80; (IPC1-7): H01L21/28
Attorney, Agent or Firm:
Toshio Nakao