Title:
LIGHT EMITTING DIODE
Document Type and Number:
Japanese Patent JPS604277
Kind Code:
A
Abstract:
PURPOSE:To enable high speed modulation by the reduction of parasitic capacitance by a method wherein a semiconductor buffer layer doped with an impurity of reverse conductivity type of the degree of compensation of the impurity diffused from an active layer in manufacturing processes is interposed between the active layer of a high impurity concentration and a semiconductor substrate. CONSTITUTION:The titled device is composed of the semiconductor buffer layer epitaxially grown on the substrate 1, the active layer 3, a clad layer 4, an electrode forming layer 5 including a Zn diffused region 51, an N-side electrode 6 including a light lead-out window 62, and a P-side electrode 7. Besides, it acts as a surface light emitting type light emitting diode which takes out light emission from the window 61 by the stricture and injection of current into the layer 3 from the diffused region 51 during action thereof. Further, the parasitic capacitance is reduced and thus the response characteristic is improved by the imposal of the buffer layer 2, whose thickness after the impurity of reverse conductivity type of the degree of compensation of the impurity diffused from the active layer is doped is the half of a carrier diffused length or less, between the substrate 1 of a high impurity concentration and the active layer 3.
Inventors:
SUZUKI AKIRA
Application Number:
JP11203383A
Publication Date:
January 10, 1985
Filing Date:
June 22, 1983
Export Citation:
Assignee:
NIPPON ELECTRIC CO
International Classes:
H01L33/14; H01L33/16; H01L33/30; H01L33/40; (IPC1-7): H01L33/00
Attorney, Agent or Firm:
Uchihara Shin
Next Patent: JPS604278