【発明の名称】神経回路網を利用した離散形コサイン変換用集積回路

Title:

【発明の名称】神経回路網を利用した離散形コサイン変換用集積回路

Document Type and Number:

Japanese Patent JP2744120

Kind Code:

B2

Abstract:

A discrete cosine transform chip includes circuits using neural network concepts that have parallel processing capability as well as conventional digital logic circuits. In particular, the discrete cosine transform chip includes a cosine term processing portion, a multiplier, an adder, a subtractor, and two groups of latches. The multiplier, the adder and the subtractor incorporated in the discrete cosine transform chip use unidirectional feed back neural network models.

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Inventors:

Chung Hosen
Yanamitsu Yanagi

Application Number:

JP22234890A

Publication Date:

April 28, 1998

Filing Date:

August 23, 1990

Export Citation:

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Assignee:

Samsung Electronics Co., Ltd.

International Classes:

G06F15/18; G06F17/14; G06N3/00; G06N3/063; G06N99/00; (IPC1-7): G06F17/14; G06F15/18

Domestic Patent References:

JP1193982A

Attorney, Agent or Firm:

Hiroaki Sakai

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