Title:
【発明の名称】半導体装置の製造方法
Document Type and Number:
Japanese Patent JP3066654
Kind Code:
B2
Abstract:
PURPOSE:To reduce a dark current by a method wherein a heterojunction having a composition-tilted layer between elements A to D and elements A, B is included between a first semiconductor layer and a second semiconductor layer which are respectively specific. CONSTITUTION:A constitution having the following is adopted: a first compound semiconductor layer composed of quaternary elements A to D; a second compound semiconductor layer composed of binary elements A, B out of the quaternary elements; and a heterojunction provided with a composition-tilted layer between the elements A to D and the elements A, B between the first semiconductor layer and the second semiconductor layer. Consequently, it is possible to prevent the lattice mismatching from being caused between heterojunctions, to reduce a lattice defect, to enhance the characteristic of the heterojunction and to reduce a defect near the interface between a light-absorbing layer and a carrier-multiplying layer. Thereby, a dark current can be reduced.
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Inventors:
Toru Uchida
Application Number:
JP32131190A
Publication Date:
July 17, 2000
Filing Date:
November 27, 1990
Export Citation:
Assignee:
富士通株式会社
International Classes:
H01L21/205; H01L31/107; (IPC1-7): H01L31/107; H01L21/205
Domestic Patent References:
| JP2262378A | ||||
| JP63187671A | ||||
| JP59136981A | ||||
| JP2133970A |
Attorney, Agent or Firm:
Shoji Kashiwaya (1 person outside)