VERTICAL-DIRECTION INTEGRATED SEMICONDUCTOR STRUCTURE

Japanese Patent JPH0629307

A

PURPOSE: To enable a BiMOS structure with smaller surface area, smaller leakage current, less short-channel effect and reduced deviation of channel length. CONSTITUTION: Transistors are formed as a bipolar or an MOS transistor. The bipolar transistor is provided with a first current electrode 26 located below a control electrode 28 and a second current electrode 32 located above the control electrode. The MOS transistor is provided with a first current electrode 54 which is below a channel region 56 and a lightly doped source region 58 and highly doped source region 60 above the channel region. A control electrode conductor layer 40 adjoins laterally a sidewall dielectric layer 48, and the sidewall dielectric layer adjoins the channel region laterally. A conductor layer functions as a gate electrode. Each of the transistors is integrated vertically as a vertically-integrated BiMOS circuit. Each transistor is electrically isolated by isolation.

JIYON TEI FUITSUCHI
KARUROSU EI MAZUUA
KIISU II UITETSUKU
JIEIMUZU DEI HAIDEN

JP5792193A

February 04, 1994

February 23, 1993

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MOTOROLA INC

H01L21/8249; H01L21/331; H01L21/336; H01L21/822; H01L27/06; H01L29/73; H01L29/732; H01L29/78; (IPC1-7): H01L21/331; H01L29/73; H01L27/06

Yoshiaki Ikeuchi

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