Title:
INTEGRATED CIRCUIT CHIP
Document Type and Number:
Japanese Patent JPS598365
Kind Code:
A
Abstract:
For reducing self-induced switching noise a two terminal non-linear impedance means is connected to the collector of an output transistor (T1) of a driver circuit and the reference potential line. It comprises one or more serially connected diodes, which may be formed by the base-collector junctions of bipolar transistors (TS1, TS2).
Inventors:
JIYATSUKU AASAA DOORAA
JIYOSEFU MAIKERU MOSUREE
SUCHIIBUN DAGURASU UEITSUERU
JIYOSEFU MAIKERU MOSUREE
SUCHIIBUN DAGURASU UEITSUERU
Application Number:
JP8286083A
Publication Date:
January 17, 1984
Filing Date:
May 13, 1983
Export Citation:
Assignee:
IBM
International Classes:
H01L21/822; H01L21/8222; H01L27/04; H01L27/06; H03K17/16; (IPC1-7): H01L27/04; H01L27/06; H01L27/08
Attorney, Agent or Firm:
Tsukio Okada
Next Patent: TREATMENT OF GARNIERITE