Title:
SEMICONDUCTOR DEVICE
Document Type and Number:
Japanese Patent JPS5951539
Kind Code:
A
Abstract:
PURPOSE:To visually confirm fluctuation in working and improve working accuracy through re-working etc. by providing a continuous pattern consisting of a pair of the main scale and a specific sub-scale which is in contact therewith. CONSTITUTION:The main scale consisting of the two or more patterns 1, 2 which are spaced by a certain distance is formed. A sub-pattern 3, which is in contact with the main pattern 1, 2 and is overlap with the pattern 1, 2 is within the width of patterns 1,2 is formed for the main scale, an overlap margin of the main patterns 1, 2 and sub-pattern 3 is determined. Thereafter, a working accuracy is measured. Thereby, the area where the over margin of the main patterns 1, 2 and sub-scale pattern 3 becomes 0 has come to have the dimension where the half (1/2) of vernier is side-etched. Accordingly, amount of side etch can be measured visually by disposing a plurality of vernier patterns and working accuracy can be measured quickly.
More Like This:
Inventors:
MATSUKUMA MOICHI
Application Number:
JP16185382A
Publication Date:
March 26, 1984
Filing Date:
September 17, 1982
Export Citation:
Assignee:
NIPPON ELECTRIC CO
International Classes:
H01L21/30; H01L21/027; H01L21/66; (IPC1-7): H01L21/30
Domestic Patent References:
| JPS57132008A | 1982-08-16 |
Attorney, Agent or Firm:
Uchihara Shin
Previous Patent: A nuclear fuel burnup evaluation system, its valuation method, and its program
Next Patent: JPS5951540
Next Patent: JPS5951540