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Title:
DISPLAY DEVICE OF ULTRASONIC FLAW DETECTION PICTURE
Document Type and Number:
Japanese Patent JPS5931449
Kind Code:
A
Abstract:

PURPOSE: To evaluate a flaw detection picture accurately by composing a picture processing part of a deflection signal circuit, a digital picture memory, a range switching circuit, a digital echo memory, a display device, and a control circuit.

CONSTITUTION: An A-scope signal 2 is stored temporarily in the digital echo memory 3 by a constant sampling clock after A/D conversion. The deflection signal circuit 5 generates digital addresses confirming to the locus of an ultrasonic wave under the control of the control circuit 6. The data stored temporarily in the memory 3 is written as a luminance signal in the digital picture memory 4 under the control of the control circuit 6 according to the addresses generated by the circuit 5, and the flaw detection picture such as a sectional image is generated, stored, and displayed on the display device 1. Then, the range switching circuit 12 decides on the display rate of one dot of the memory 4 to divide the addresses of the memory 3 into blocks according to the display rate, and writes data with the highest level among data in every block in the memory 4 as the luminance signal. Consequently, the flaw detection picture is evaluated accurately.


Inventors:
TATEYAMA MASARU
KOSHIRAE MITSUO
Application Number:
JP14116782A
Publication Date:
February 20, 1984
Filing Date:
August 16, 1982
Export Citation:
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Assignee:
HITACHI LTD
HITACHI ENG CO LTD
International Classes:
G01B17/00; G01N29/22; G01N29/44; (IPC1-7): G01B17/00; G01N29/04
Attorney, Agent or Firm:
Katsuo Ogawa