Title:
SEMICONDUCTOR DEVICE
Document Type and Number:
Japanese Patent JPS605542
Kind Code:
A
Abstract:
PURPOSE:To reduce the disconnection of wirings in multilayer wirings by using the wiring layer of the uppermost layer exclusively for a power source, and entirely formed it on an element region. CONSTITUTION:Another layer is increased except wiring aluminum layer 4, and an aluminum wiring layer 15 for a power source such as that exclusive for VDD is formed. The layer 15 is entirely formed on the uppermost layer of an element region, but a fine pattern is not formed. Since the aluminum layer of the uppermost layer is solidly bonded in a pure type in this manner, no problem such as a disconnection or the like occurs, nor a deterioration phenomenon such as an electromigration occurs thereon. Since the aluminum layer is covered on the overall lower active element region, a shielding effect is acted to increase the withstand strength against noise.
Inventors:
MIMURA KATSUICHI
Application Number:
JP11284883A
Publication Date:
January 12, 1985
Filing Date:
June 24, 1983
Export Citation:
Assignee:
TOSHIBA KK
International Classes:
H01L21/822; H01L21/3205; H01L21/82; H01L23/52; H01L27/04; (IPC1-7): H01L21/82; H01L21/88; H01L27/04
Attorney, Agent or Firm:
Noriyuki Noriyuki
Next Patent: JPS605543