PURPOSE: To reduce the resistance when ON position is given as well as to reduce power consumption for the titled resistor by a method wherein a conductor layer to be used as an ohmic contacting current circuit is provided on the surface of the high specific resistance drain region of the MOSFET whereon the high specific resistance drain region is provided on the channel side.
CONSTITUTION: An n- type layer 2 of high specific resistance is provided on an n+ type substrate 1, a p type region 6 is formed thereon, an n+ type region 8 to be turned to a source region is provided in the region 6, and then a gate electrode 11 is formed on the surface 9 of the remaining p type region which will be used as a channel region through the intermediary of an insulating layer 10. Also, an n+ type region 5 is provided on the surface of an n- type layer 2 as a low resistance drain region, and a conductor layer 41 is provided as an ohmic- contacting current circuit on the surface of a high specific resistance drain region 7 located between a channel region 9 and a low resistance drain region 5. As a result, the series resistance between a source and a drain is reduced by the action of a conductor layer 41, thereby enabling to cut down the power consumption of the titled transistor.
KATOU KUNIHARU
SHIMADA YUUKI
KURODA IWAO
YOSHIDA HIROSHI
NIPPON ELECTRIC CO
| JPS4915911A | 1974-02-12 |