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Patent Searching and Data


Title:
THIN FILM TRANSISTOR
Document Type and Number:
Japanese Patent JPS59126673
Kind Code:
A
Abstract:

PURPOSE: To increase the reliability at a low cost by forming an interlayer insulation film on a gate electrode wiring via a lead glass layer, in a thin film transistor (Tr) whose gate electrode material is made of polycrystalline Si.

CONSTITUTION: The Tr region 19 is formed on the main surface of a transparent insulation substrate 18 by means of a polycrystalline Si film. A gate oxide film 20 is formed on its surface. Next, the polycrystalline Si 21 for an electrode is deposited on the whole of the main surface of the substrate 18. Then, the Si 21 is photo-etched, the electrode wiring 22 is formed, and successively ions are implanted with an ion implanting device, thus forming the source and the drain. Thereafter, the wiring resistance is decreased by doping phosphorus at a high concentration into the polycrystalline Si electrode wiring. An oxide film 24 is deposited as an interlayer insulation film on a phosphorus glass and thereafter annealed. After boring a contact, a source and a drain electrode 25 are formed.


Inventors:
YAMADA TAKEO
Application Number:
JP244583A
Publication Date:
July 21, 1984
Filing Date:
January 11, 1983
Export Citation:
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Assignee:
SUWA SEIKOSHA KK
International Classes:
H01L27/12; H01L29/78; H01L29/786; (IPC1-7): H01L27/12
Attorney, Agent or Firm:
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