Title:
PROGRAM TEST SYSTEM
Document Type and Number:
Japanese Patent JPS6091457
Kind Code:
A
Abstract:
PURPOSE: To evaluate in detail and accurately a program by starting the program within a memory which is set in a connection state while one of multiplexed memories is separated from a processor, then comparing the contents of memories with each other.
CONSTITUTION: Bus switching parts 18 and 28 perform connection/separation between memories 1 and 2 and data writing buses 20 and 21 led from central processors 10 and 11, respectively. One of both memories 1 and 2 is separated from processors 10 and 11, and a program within a connected memory is started. Then the contents of a memory storing the executed program are compared with those of a separated memory to evaluate the corresponding program.
Inventors:
ARAI TAKAO
Application Number:
JP19862183A
Publication Date:
May 22, 1985
Filing Date:
October 24, 1983
Export Citation:
Assignee:
FUJITSU LTD
International Classes:
G06F11/28; G06F11/36; (IPC1-7): G06F11/28
Attorney, Agent or Firm:
Sadaichi Igita