Title:
MANUFACTURE OF RESIST PATTERN
Document Type and Number:
Japanese Patent JPS5940535
Kind Code:
A
Abstract:
PURPOSE:To prevent a resist pattern from thermal deformation when the resist pattern is to be evaporated by a method wherein a part of the resist pattern is surrounded with by protective patterns. CONSTITUTION:The protective patterns 19-21 are formed around the gate pattern 16 of an FET. In that case, even when the resist film 12 is exposed to a high temperature generated according to radiant heat from an evaporation source 15 and to radiant heat generated when an evaporated material adhered to the resist film 12 on a substrate 11 is condensed to be solidified, flowing and collapse of the pattern of the resist film 12 are not generated, a change of size is not generated, and moreover lifting off can be attained without damaging the accuracy of the pattern edge part. Accordingly, sharp reduction of the evaporation speed is not necessitated, manufacturing efficiency is enhanced, and moreover formation of the fine pattern of high melting point material according to lift off technique, which has impossible heretofore, is made possible.
Inventors:
ATOUDA NOBUFUMI
MATSUMOTO KAZUHIKO
HASHIZUME NOBUROU
MATSUMOTO KAZUHIKO
HASHIZUME NOBUROU
Application Number:
JP15028482A
Publication Date:
March 06, 1984
Filing Date:
August 30, 1982
Export Citation:
Assignee:
KOGYO GIJUTSUIN
International Classes:
H01L21/306; (IPC1-7): H01L21/306
Domestic Patent References:
| JPS52149982A | 1977-12-13 | |||
| JPS5440086A | 1979-03-28 |
Attorney, Agent or Firm:
Director, Electronic Technology Research Institute, AIST