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Patent Searching and Data


Title:
SEMICONDUCTOR DEVICE
Document Type and Number:
Japanese Patent JPS5921063
Kind Code:
A
Abstract:

PURPOSE: To enable to shorten the turn off time by a method wherein P-N junctions are formed between following two regions in contact with the second main surface at the second region between the third and fifth regions, and the sixth region whose impurity density is higher than that of the second region is provided.

CONSTITUTION: The device is formed in a structure wherein the depth W2 of an inversion prevention region 15 is shallower than the junctions J2 and J2', and the isolation width W between the opposed junctions J2 and J2' becomes in the depletion state (pinch-off state) between the opposed junctions J2 and J2' at a lower voltage than the withstand voltage of the inversion prevention region 15. In such a structure, even when a voltage over the following voltage is impressed between an anode and a cathode in the pinch-off state of the junctions J2 and J2' at some voltage, the voltage over some voltage is not impressed on the inversion prevention region 15, therefore the withstand voltages of the junctions J2 and J2' come to be determined by the impurity density of the first base region 2 not by that of the inversion prevention region 15.


Inventors:
NAKAGAWA TSUTOMU
Application Number:
JP13276482A
Publication Date:
February 02, 1984
Filing Date:
July 27, 1982
Export Citation:
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Assignee:
MITSUBISHI ELECTRIC CORP
International Classes:
H01L29/74; H01L29/06; H01L29/744; (IPC1-7): H01L29/74
Domestic Patent References:
JPS5375430A1978-07-04
JPS50117377A1975-09-13
JPS4940887A1974-04-17
JPS487688A
JPS495248U1974-01-17
JPS4817686A
Attorney, Agent or Firm:
Masuo Oiwa