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Title:
SEMICONDUCTOR INTEGRATED CIRCUIT
Document Type and Number:
Japanese Patent JPS5986332
Kind Code:
A
Abstract:

PURPOSE: To improve the input electrostatic dielectric strength by inserting a PNP transistor (TR) whose emitter is connected to an input terminal, whose collector is connected to a ground terminal and whose base is connected to the input terminal via a resistor.

CONSTITUTION: When a positive electrostatic voltage is applied to an input terminal 1, a collector-base junction of a TR8 of a electrostatic destruction preventing circuit provided freshly is biased reversely, and a reverse bias leakage current flows to a ground terminal 3 via a base-collector junction. Then, the said leakage current is increased with the increase in the voltage at the input terminal 1, and when the potential drop of the resistor 9 by the current reaches a forward threshold voltage between base and emitter of the TR8, the TR8 is conductive, and most of the electrostatic discharge current flowing to the input terminal flows to a ground terminal as an emitter-collector current at the conductive state of the TR8.


Inventors:
MORI SUSUMU
Application Number:
JP19623382A
Publication Date:
May 18, 1984
Filing Date:
November 09, 1982
Export Citation:
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Assignee:
NIPPON ELECTRIC CO
International Classes:
H03K17/08; H03K17/16; (IPC1-7): H03K17/16
Domestic Patent References:
JPS5640271A1981-04-16
JPS5640272A1981-04-16
Attorney, Agent or Firm:
Uchihara Shin