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Patent Searching and Data


Title:
DATA PROTECTION SYSTEM OF BUBBLE MEMORY
Document Type and Number:
Japanese Patent JPS6015891
Kind Code:
A
Abstract:

PURPOSE: To attain the prevention of malfunction by providing an input power supply holding circuit to the pre-stage of a voltage supply circuit supplying an operating voltage to the drive circuit of a bubble memory so as to release the holding by a voltage drop detecting signal.

CONSTITUTION: The voltage drop detecting circuit 16e supervises a power supply voltage 24V and an operating voltage 5V and outputs a voltage drop detecting signal VDS when any of the voltages drops below a prescribed level. The detecting signal VDS is inputted to the base of a transistor (TR) of a hold circuit 16f so as to turn off the TR, resulting in interrupting the supply of the power supply votage 24V to a power supply circuit 16d. Even if the supply of the power is interrupted to the power supply circuit 16d by an internal capacitor, the circuit 16d outputs the output voltage of a prescribed level for a prescribed time. Even if the power supply voltage is restored to a normal state again, the output voltage of the power supply circuit 16d becomes a voltage below the normal operating voltage thereby keeping the output of the detection signal VD and an inhibition signal IHS.


Inventors:
HATSUTORI SEIICHI
KANDA KUNIO
Application Number:
JP12411883A
Publication Date:
January 26, 1985
Filing Date:
July 08, 1983
Export Citation:
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Assignee:
FANUC LTD
International Classes:
G06F12/16; G11C11/14; G11C19/08; (IPC1-7): G11C11/14; G06F12/16; G11C19/08
Domestic Patent References:
JPS5457845A1979-05-10
Attorney, Agent or Firm:
Minoru Tsuji