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Title:
MANUFACTURE OF JUNCTION TYPE FIELD-EFFECT TRANSISTOR
Document Type and Number:
Japanese Patent JPS59172273
Kind Code:
A
Abstract:

PURPOSE: To form source-drain up to the deep section of silicon, and to reduce resistance between the source-drain by diffusing an impurity to a single crystal silicon layer from a porous silicon layer through the oxidation of porous silicon.

CONSTITUTION: A P type epitaxial layer 21 is formed on the surface of an N type single crystal silicon substrate 20, and a mask is shaped on the surface of the layer 21 by a silicon oxide film 22. A P type impurity is doped and diffused from the surface to form regions 23 containing the P type impurity in high concentration. The surface except the regions 23 is coated with a silicon nitride film 24. The substrate is anodic-oxidized in an HF solution, and the regions containing the P type impurity in high concentration are brought to a porous state and changed into porous silicon 25. The P type impurity is doped to the porous silicon 25. An oxidation advances in the porous silicon and the porous silicon is turned into silicon oxides 26 through treatment in an oxygen atmosphere at a high temperature. The P type impurity is diffused into the peripheral epitaxial layer 21 on the oxidation, and regions 27 containing the P type impurity in high concentration are formed.


Inventors:
SATOU AKINOBU
Application Number:
JP4676883A
Publication Date:
September 28, 1984
Filing Date:
March 18, 1983
Export Citation:
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Assignee:
TOKO INC
International Classes:
H01L21/316; H01L21/337; H01L29/808; (IPC1-7): H01L21/316
Domestic Patent References:
JPS5475991A1979-06-18
JPS5154780A1976-05-14
JPS51150984A1976-12-24



 
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