MANUFACTURE OF SEMICONDUCTOR DEVICE

Japanese Patent JPS5979521

A

PURPOSE:To obtain a shallow diffusion region with high yield by effecting diffusion through polycrystalline Si layer for forming a region requiring strict joining distance or electrode and through a mask formed out of protective layer obtained by selective oxidation of polycrystalline Si layer for forming a junction point. CONSTITUTION:P type base region B is formed by diffusion on a superficial layer of N type semiconductor substrate 1, entire surface of which is covered with SiO2 layer 2 with including said region B where windows 3a and 3b corresponding to said region B and substrate 1 respectively are opened. Then, a polycrystalline Si layer 4 and PSG layer 5 are laminated to cover. Diffusion is effected through the layer 4 by using the layer 5 as an impurity source to form N<+> type emitter region E and collector electrode C. After that, the layer 5 is removed and exposed layer 4 is operated selective oxidation to be changed into SiO2 layer 7 where windows corresponding to the region B, E and the electrode C are opened to which Al electrodes 8a-8c are attached. Thus, high peak inverse voltage can be obtained in spite of shallowness of impurity region so that this method is suitable for forming transistor for microwave.

KUSUSE NORIO

JP19020382A

May 08, 1984

October 29, 1982

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NIPPON ELECTRIC CO

H01L29/73; H01L21/225; H01L21/265; H01L21/331; (IPC1-7): H01L21/265; H01L29/68

Uchihara Shin

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