PURPOSE: To inspect the existence of a defective memory cell in accordance with the compression data by data-compressing test data of plural memory cells and test data of other plural memory cells previously read out and being latched.

CONSTITUTION: First of all, the test data X0,/X0 - X3,/X3 from a pair of bit lines B0,/B0 - B3,/B3 are latched to latch circuits 18 with the use of a data bus 11 and a 1st dividing bus 14, and next, the test data X4,/X4 - X7,/X7 from a pair of bit lines B4,/B4 - B7,/B7 and simultaneously the test data X0,/X0 - X7,/X7 are made so as to be read out to a data compression circuit 24 with the use of the data bus 11 and a 2nd dividing bus 15, therefore, the test of eight cells 22 can be made at one test cycle, then the test time is reduced and the efficiency for test work is enhanced.