PURPOSE: To process a connection change of a queue at a high speed, by executing comparison processing to the queue and obtaining a queue address.

CONSTITUTION: An interruption is stored in a latching circuit 7, and is applied as an interruption storage signal to a processing task selecting circuit 8. At the same time, an interruption signal is applied to a CPU 31 through an OR gate 13. The processing task selecting circuit 8 selects a processing task corresponding to the interruption signal. A queue address calculating circuit 9 applies a queue address to a queue memory 11 through an address bus 23 of the queue address calculating circuit 9 and a common address bus 27, gives access to data of the queue memory 11 through a data bus 24 of the queue memory 11, a common data bus 25, and a data bus 22 of the queue address calculating circuit 9, executes comparison processing with a new task priority degree 20, and calculates a queue address. This address is provided to a queue shifting circuit 10.