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Title:
SYMBOL TIMING EXTRACTING DEVICE
Document Type and Number:
Japanese Patent JPS60126940
Kind Code:
A
Abstract:

PURPOSE: To make the generation of the threshold effect of a timing extraction loop hard to occur and to extract a timing signal with less jitter from a biphase signal by using an integral value for every symbol of the biphase signal to decide on the polarity of data.

CONSTITUTION: The 1st integrator 1a1 integrates data over the former half of one symbol and the integral value is held in a data delay device 6. The 2nd integrator 1a2 integrates the data over the latter half of the symbol. The integral value is multiplied by (-1) and then added to the integral value of the former half by using an adder 7, and a data detector 2 uses said addition result to decide whether the polarity of the data is 0 or 1. The 3rd integrator 1b, on the other hand, integrates the biphase signal almost at mid-pit transition and generates a positive or negative voltage in proportion to an error in zero timing when the timing relation is correct and there is the error.


Inventors:
YOKOMIZO TOSHIO
Application Number:
JP23467283A
Publication Date:
July 06, 1985
Filing Date:
December 13, 1983
Export Citation:
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Assignee:
NIPPON ELECTRIC CO
International Classes:
H04L25/49; H04L7/00; H04L7/027; H04L7/033; (IPC1-7): H04L7/02; H04L25/40
Attorney, Agent or Firm:
Toshi Inoguchi



 
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