Title:
PICTURE PROCESSOR
Document Type and Number:
Japanese Patent JPS60153564
Kind Code:
A
Abstract:
PURPOSE:To remove unnatural state such as the distortion of a picture and to attain accurate and faithful picture processing corresponding to the purpose of picture deformation by providing an address converting circuit, an averaging circuit and a clock generating circuit to the titled device. CONSTITUTION:When a deformed picture is to be formed by coordinate conversion, an address conversion circuit 35 executes prescribed arithmetic processing on the basis of address data generated from an address generating circuit 31 and outputs (n) conversion address groups close to a remarked address. The output data are averaged by an averaging circuit 36 through the 1st picture memory 32 and outputted as picture data PB. The data PB are inputted to the 2nd picture memory 33 by using address data from a delay circuit 34 as its writing address. When a pulse is inputted synchronously with a supplied clock, a coordinate-converted picture converted at the same timing as the output of the picture data from the circuit 36 is inputted to the memory 33. Thus, accurate and faithful picture processing corresponding to the purpose of picture deformation can be attained.
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Inventors:
INOUE TOSHIBUMI
Application Number:
JP722484A
Publication Date:
August 13, 1985
Filing Date:
January 20, 1984
Export Citation:
Assignee:
DAINIPPON SCREEN MFG
International Classes:
G06T3/00; G09G5/36; H04N1/40; H04N1/387; (IPC1-7): G06F15/62; G09G1/06; H04N1/387
Domestic Patent References:
| JPS5533287A | 1980-03-08 |
Attorney, Agent or Firm:
Soichi Takezawa