PURPOSE: To reduce a through current from a power supply voltage to ground voltage so as to reduce the power supply current of an output buffer circuit by outputting a detecting signal and reducing the driving capacity of the output signal of the main body of the output buffer circuit by means of the detecting signal when the output voltage level of the main body is opposite to the level of the output signal of the main body.

CONSTITUTION: When the output voltage level S4 of this output buffer o ground voltage so as to reduce the power supply current of an output buffer circuit by outputting a detecting signal and reducing the driving capacity of the output signal of the main body of the output buffer circuit by means of the detecting signal when the output voltage level of the main body is opposite to the level of the output signal of the main body. circuit is in an 'H' logical voltage state, P-channel type MOS transistors Qp11 and Qp12 hold turned-on states. When the output voltage level S4 is forcibly set to an 'L' logical voltage state (ground voltage VSS) front the outside while the output signal S3 of the main body 2 of the output buffer circuit is in an 'H' logical voltage state, the transistor Qp12 holds a turned-on state. However, the 'H' logical voltage (detecting signal S5) of a node N16 is inputted to an suppression circuit 3 and a node N11 becomes an 'H' logical voltage state. Therefore, the transistor Qp11 is turned off. Thus, the 'H' logical voltage driving capacity of the output signal S3 is reduced and the through current between a power supply voltage VCC and the ground voltage VSS can be reduced.