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Patent Searching and Data


Title:
MULTILEVEL PULSE GENGRATING CIRCUIT
Document Type and Number:
Japanese Patent JPS5863224
Kind Code:
A
Abstract:

PURPOSE: To generate a multilevel pulse and to drive a capacitive load, by providing a capacitor between a driver of the first stage and a driver of the next stage and performing the charging/discharging through the capacitor and via a diode in response to the level of an input signal.

CONSTITUTION: When a pulse of a ternary level is produced, a driver 1 of the first stage is provided between an earth and a power supply terminal 8 to which a power supply voltage VCC1 is supplied. Then a pulse signal P3 is supplied to an input terminal 3, a terminal 4 is grounded in a high level section of the signal P3. Thus a capacitor 9 is charged with a power supply voltage VCC2 via a diode 11 and at the same time a driver 2 works between the voltage VCC2 and the earth. Then the terminal 4 is connected to the terminal 8 when the signal P3 set at a low level, and the power supply voltage is set at VCC1 +VCC2 to the driver 2. The driver 2 works between the voltage VCC1 +VCC2 and the earth. When the signal P3 is set at a high level again, a path is formed from a load 7 to a diode 12. The output potential is instantly reset to VCC2 by the capacity of the capacitor 9. Thus a signal P1 of a ternary level is produced.


Inventors:
KONDOU NORIAKI
NISHIMURA TOSHIJI
Application Number:
JP16310881A
Publication Date:
April 15, 1983
Filing Date:
October 13, 1981
Export Citation:
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Assignee:
SONY CORP
International Classes:
H03K4/02; H03K5/156; H04N5/335; H04N5/341; H04N5/372; H04N5/376; (IPC1-7): H03K5/00
Attorney, Agent or Firm:
Masatomo Sugiura